Jigar 4 Electronics

Monday, 19 November 2012

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Q.29)Tell some of applications of buffer? (asked in verilog Interview)

A.28)Tie one of xor gates input to 1 it will act as inverter & Tie one of xor gates input to 0 it will act as buffer

Q.28)Given only two xor gates one must function as buffer and another as inverter?

at the end of metastable state,the flip-flop settles down to either '1' or '0'.This whole process(see last 2 msgs)is known as metastability.

(Contd…)this unpredictable state is known as metastable state (quasi stable state)

Whenever there are setup and hold time violations in any flip-flop, it enters a state where its output is unpredictable(Contd…)

amnt of time after the clock edge that same i/p signal has to be held B4 changing it to make sure it is sensed properly at the clock edge.

Q.27)what is hold time?

is the amount of time before the clock edge that the input signal needs to be stable to guarantee it is accepted properly on the clock edge.